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This commit: * renames all remaining instances of "DRAM" (which is ambiguous) to "LUTRAM" (which is not), finishing the work started in the commit 698ab9be; * renames memory rule files to brams.txt/lutrams.txt; * adds/renames script labels map_bram/map_lutram; * extracts where necessary script labels map_ffram and map_gates; * adds where necessary options -nobram/-nolutram. The end result is that BRAM/LUTRAM/FFRAM aspects of every target are now consistent with each other. Per architecture: * anlogic: rename drams.txt→lutrams.txt, add -nolutram, add :map_lutram, :map_ffram, :map_gates * ecp5: rename bram.txt→brams.txt, lutram.txt→lutrams.txt * efinix: rename bram.txt→brams.txt, add -nobram, add :map_ffram, :map_gates * gowin: rename bram.txt→brams.txt, dram.txt→lutrams.txt, rename -nodram→-nolutram (-nodram still recognized), rename :bram→:map_bram, :dram→:map_lutram, add :map_ffram, :map_gates |
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.. | ||
tests | ||
.gitignore | ||
abc9_5g.box | ||
abc9_5g.lut | ||
abc9_5g_nowide.lut | ||
abc9_map.v | ||
abc9_model.v | ||
abc9_unmap.v | ||
arith_map.v | ||
brams.txt | ||
brams_connect.py | ||
brams_init.py | ||
brams_map.v | ||
cells_bb.v | ||
cells_ff.vh | ||
cells_io.vh | ||
cells_map.v | ||
cells_sim.v | ||
dsp_map.v | ||
ecp5_ffinit.cc | ||
ecp5_gsr.cc | ||
latches_map.v | ||
lutrams.txt | ||
lutrams_map.v | ||
Makefile.inc | ||
synth_ecp5.cc |