Clifford Wolf a6750b3753 Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)		2014-02-03 13:01:45 +01:00
..
.gitignore
aes_kexp128.v
always01.v
always02.v
always03.v
arrays01.v
carryadd.v	Bugfix in name resolution with generate blocks	2014-01-30 15:01:28 +01:00
constpower.v
dff_different_styles.v
fiedler-cooley.v
forgen01.v
forgen02.v
fsm.v
generate.v	Various improvements in support for generate statements	2013-12-04 21:06:54 +01:00
hierarchy.v	Implemented correct handling of signed module parameters	2013-11-24 17:17:21 +01:00
i2c_master_tests.v
loops.v
macros.v	Added elsif preproc support	2013-12-18 13:41:36 +01:00
mem2reg.v
mem_arst.v
memory.v	Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)	2014-02-03 13:01:45 +01:00
multiplier.v	Added multiplier test case from eda playground	2013-12-18 13:43:53 +01:00
muxtree.v
omsp_dbg_uart.v
operators.v
paramods.v
partsel.v
process.v
rotate.v	Another name resolution bugfix for generate blocks	2013-11-20 13:57:40 +01:00
run-test.sh
signedexpr.v
sincos.v	Fix in sincos testbench gen	2013-12-04 09:24:52 +01:00
subbytes.v
task_func.v
undef_eqx_nex.v	Added proper === and !== support in constant expressions	2013-12-27 13:50:08 +01:00
usb_phy_tetsts.v
values.v	Replaced RTLIL::Const::str with generic decoder method	2013-12-04 14:14:05 +01:00
vloghammer.v