Clifford Wolf 53655d173b Added $global_clock verilog syntax support for creating $ff cells		2016-10-14 12:33:56 +02:00
..
cmds	Added "tee +INT -INT"	2016-09-06 17:43:24 +02:00
equiv	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
fsm	Minor bugfix in FSM reset state detection	2016-07-12 09:46:15 +02:00
hierarchy	Removed $predict again	2016-08-28 21:35:33 +02:00
memory	Typo fix.	2016-09-08 10:57:16 +03:00
opt	Added "opt_rmdff -keepdc"	2016-09-30 17:02:38 +02:00
proc	Added $global_clock verilog syntax support for creating $ff cells	2016-10-14 12:33:56 +02:00
sat	Added $ff and $_FF_ cell types	2016-10-12 01:18:39 +02:00
techmap	Added MEMID handling to "flatten" pass	2016-10-14 10:36:37 +02:00
tests	Cosmetic fix in test_autotb.cc	2016-09-19 20:43:43 +02:00