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Code Activity
yosys/tests/arch/intel_alm
History
Eddie Hung 52fbaeca07 tests: update fsm.ys resource count 
Suspect it is to do with map/set ordering in techmap; should
be fixed by #1862?
2020-07-04 19:45:10 +02:00
..
.gitignore Add missing .gitignore file 2020-06-04 22:25:47 +02:00
add_sub.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
adffs.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
counter.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
dffs.ys intel_alm: fix DFFE matching 2020-06-11 19:55:51 +02:00
fsm.ys tests: update fsm.ys resource count 2020-07-04 19:45:10 +02:00
logic.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
lutram.ys intel_alm: direct LUTRAM cell instantiation 2020-05-07 21:03:13 +02:00
mux.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
quartus_ice.ys intel_alm: work around a Quartus ICE 2020-04-23 11:03:28 +02:00
run-test.sh synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
shifter.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00
tribuf.ys synth_intel_alm: alternative synthesis for Intel FPGAs 2020-04-15 11:40:41 +02:00