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Code Activity
yosys/techlibs/intel
History
Diego 643ae9bfc5 Fixing issues in CycloneV cell sim
2019-04-11 19:59:03 -05:00
..
a10gx Clean whitespace and permissions in techlibs/intel 2017-10-05 16:23:49 +02:00
common Changes in GoWin synth commands and ALU primitive support 2018-12-03 20:08:35 -06:00
cyclone10 Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device 2018-03-31 22:48:47 -06:00
cycloneiv Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device 2018-03-31 22:48:47 -06:00
cycloneive Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
cyclonev Fixing issues in CycloneV cell sim 2019-04-11 19:59:03 -05:00
max10 Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device 2018-03-31 22:48:47 -06:00
Makefile.inc Initial Cyclone 10 support 2017-11-08 22:45:21 -06:00
synth_intel.cc Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00