Eddie Hung d394b9301b Back to passing all xc7srl tests!		2019-05-01 18:23:21 -07:00
..
achronix	Reduce amount of trailing whitespace in code base	2019-02-28 14:58:11 -08:00
anlogic	Reduce amount of trailing whitespace in code base	2019-02-28 14:58:11 -08:00
common	Merge pull request #772 from whitequark/synth_lut	2019-01-02 15:44:57 +01:00
coolrunner2	Unify usage of noflatten among architectures	2019-01-04 11:37:25 +01:00
easic	Fix typographical and grammatical errors and inconsistencies.	2019-01-02 13:12:17 +00:00
ecp5	Add handling of init attributes in "opt_expr -undriven"	2019-04-30 14:46:12 +02:00
gowin	Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master	2019-04-22 09:09:27 +02:00
greenpak4	techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module	2019-02-26 09:40:46 -08:00
ice40	Cleanup ice40	2019-04-26 14:31:59 -07:00
intel	Fixing issues in CycloneV cell sim	2019-04-11 19:59:03 -05:00
sf2	Revert "synth_* with -retime option now calls abc with -D 1 as well"	2019-04-18 07:59:16 -07:00
xilinx	Back to passing all xc7srl tests!	2019-05-01 18:23:21 -07:00
.gitignore	added .gitignore files	2013-01-05 11:19:11 +01:00