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yosys/tests/arch/common
Krystine Sherwin 8ded7020f4 tests: asymmetric sync rams now correctly asymmetric
Also both use the same named parameters for better mirroring.
2023-12-04 15:52:03 +01:00
..
memory_attributes
add_sub.v
adffs.v Allow initial blocks to be disabled during tests 2021-11-13 21:53:25 +01:00
blockram.v tests: asymmetric sync rams now correctly asymmetric 2023-12-04 15:52:03 +01:00
blockrom.v
counter.v
dffs.v Allow initial blocks to be disabled during tests 2021-11-13 21:53:25 +01:00
fsm.v
latches.v
logic.v
lutram.v
mul.v
mux.v
shifter.v Allow initial blocks to be disabled during tests 2021-11-13 21:53:25 +01:00
tribuf.v