Eddie Hung 90750e43ef Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux		2019-06-26 16:07:18 -07:00
..
.gitignore	Update some .gitignore files	2019-06-20 14:27:57 +02:00
abc9.v	Add tests/various/abc9.{v,ys} with SCC test	2019-06-24 21:52:53 -07:00
abc9.ys	Add tests/various/abc9.{v,ys} with SCC test	2019-06-24 21:52:53 -07:00
attrib05_port_conn.v	Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.	2019-06-04 10:42:42 +02:00
attrib05_port_conn.ys	Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.	2019-06-04 10:42:42 +02:00
attrib07_func_call.v	Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.	2019-06-04 10:42:42 +02:00
attrib07_func_call.ys	Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.	2019-06-04 10:42:42 +02:00
chparam.sh	Add tests/various/chparam.sh	2019-05-06 16:03:15 +02:00
constmsk_test.v
constmsk_test.ys
constmsk_testmap.v
elab_sys_tasks.sv	Initial implementation of elaboration system tasks	2019-05-03 03:10:43 +03:00
elab_sys_tasks.ys	Initial implementation of elaboration system tasks	2019-05-03 03:10:43 +03:00
hierarchy.sh	Fix tests	2019-04-21 11:40:20 +02:00
muxcover.ys	Add more tests	2019-06-26 16:07:07 -07:00
muxpack.v	Add more tests	2019-06-21 12:31:04 -07:00
muxpack.ys	Add more tests	2019-06-21 12:31:04 -07:00
opt_rmdff.v	Fix init	2019-05-24 18:43:26 -07:00
opt_rmdff.ys	Add more tests	2019-05-24 18:33:18 -07:00
pmux2shiftx.v
pmux2shiftx.ys	Updaye pmux2shiftx test	2019-04-22 16:17:43 +02:00
reg_wire_error.sv
reg_wire_error.ys
run-test.sh
shregmap.v	Add shregmap -tech xilinx test	2019-06-12 08:34:06 -07:00
shregmap.ys	Add shregmap -tech xilinx test	2019-06-12 08:34:06 -07:00
signext.ys	Extend sign extension tests	2019-06-20 12:43:59 -07:00
specify.v	More testing	2019-05-03 15:54:25 -07:00
specify.ys	Improve tests/various/specify.ys	2019-05-06 12:26:15 +02:00
submod_extract.ys