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yosys/passes
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Marcelina Kościelnicka 61a7ec4768 opt_merge: Dedup one more use of FF cell type list.
2020-07-15 06:19:18 +02:00
..
cmds Add new builtin FF types 2020-06-23 15:40:02 +02:00
equiv Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
fsm Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
hierarchy Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
memory Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
opt opt_merge: Dedup one more use of FF cell type list. 2020-07-15 06:19:18 +02:00
pmgen Use [[maybe_unused]] instead of YS_ATTRIBUTE(unused). 2020-06-19 15:48:58 +00:00
proc proc_dlatch: Remove init values for combinatorial processes. 2020-07-12 18:50:30 +02:00
sat clk2fflogic: Consistently treat async control signals as negative hold. 2020-07-09 18:12:47 +02:00
techmap dfflegalize: Gather init values from all wires. 2020-07-12 17:39:13 +02:00
tests Merge pull request #2201 from YosysHQ/fix_test_cell_ilang 2020-06-30 17:11:13 +02:00