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42 lines
831 B
Text
42 lines
831 B
Text
read_verilog sub_double_neg.v
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hierarchy -auto-top
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proc; opt_clean
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csa_tree
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stat
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select -assert-count 2 t:$fa
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select -assert-count 1 t:$add
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select -assert-count 1 t:$not
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select -assert-none t:$sub
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design -reset
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# equiv_opt on narrow version
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read_verilog equiv_sub_double_neg.v
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hierarchy -top equiv_sub_double_neg
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proc; opt_clean
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equiv_opt csa_tree
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design -load postopt
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select -assert-count 2 t:$fa
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select -assert-count 1 t:$add
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design -reset
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read_verilog sub_double_neg.v
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hierarchy -top sub_double_neg
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proc; opt_clean
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csa_tree
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opt_clean
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# 10 - (30 - 20) = 0
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sat -set a 30 -set b 20 -set c 10 -prove y 0
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# 100 - (50 - 25) = 75
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sat -set a 50 -set b 25 -set c 100 -prove y 75
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# 0 - (0 - 0) = 0
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sat -set a 0 -set b 0 -set c 0 -prove y 0
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# 1 - (255 - 1) = 3
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sat -set a 255 -set b 1 -set c 1 -prove y 3
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log "double negation: ok"
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