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yosys/techlibs
History
Clifford Wolf 4a9e133fab Fixed a type in $mem model in simlib.v
2014-01-18 18:54:50 +01:00
..
cmos Updated abc 2013-11-21 22:39:10 +01:00
common Fixed a type in $mem model in simlib.v 2014-01-18 18:54:50 +01:00
xilinx Added "techmap -share_map" option 2013-11-24 19:50:25 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00