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yosys/techlibs/gatemate
Lofty ab316c14d2
Merge pull request #5844 from YosysHQ/lofty/abc-refactor-5
abc_new: integration testing via synth_gatemate
2026-05-06 13:40:15 +00:00
..
.gitignore
arith_map.v
brams.txt
brams_init_20.vh
brams_init_40.vh
brams_map.v
cells_bb.v gatemate: fix SERDES CDR parameters 2025-10-27 15:47:48 +01:00
cells_sim.v
gatemate_foldinv.cc Update techlibs to avoid bits() 2025-09-16 03:17:23 +00:00
inv_map.v
lut_map.v
make_lut_tree_lib.py
Makefile.inc Makefile: Add gatemate genfiles 2025-11-04 11:46:27 +13:00
mul_map.v
mux_map.v
reg_map.v
synth_gatemate.cc Merge pull request #5844 from YosysHQ/lofty/abc-refactor-5 2026-05-06 13:40:15 +00:00