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yosys/tests/arch/ice40
2020-01-12 15:21:26 -08:00
..
.gitignore
add_sub.ys
adffs.ys
bug1598.ys Add #1598 testcase 2019-12-27 16:44:57 -08:00
bug1626.ys Add #1626 testcase 2020-01-12 15:21:26 -08:00
counter.ys Call equiv_opt with -multiclock and -assert 2019-12-31 18:39:32 -08:00
dffs.ys
dpram.v
dpram.ys
fsm.ys
ice40_opt.ys unmap $__ICE40_CARRY_WRAPPER in test 2019-12-09 14:20:35 -08:00
ice40_wrapcarry.ys
latches.ys
logic.ys
lutram.ys Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
macc.v
macc.ys
mul.ys Fix warnings 2019-12-31 18:40:11 -08:00
mux.ys
rom.v Revert insertion of 'reg', leave note behind 2020-01-01 09:05:46 -08:00
rom.ys
run-test.sh
shifter.ys
tribuf.ys