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yosys/techlibs/xilinx
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Eddie Hung 04e466d5e4 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
2019-04-12 12:28:37 -07:00
..
tests
.gitignore
arith_map.v
brams.txt
brams_bb.v
brams_init.py
brams_map.v Revert BRAM WRITE_MODE changes. 2019-03-04 09:22:22 -08:00
cells_map.v
cells_sim.v Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra. 2019-04-12 09:35:15 -07:00
cells_xtra.sh Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra. 2019-04-12 09:35:15 -07:00
cells_xtra.v Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra. 2019-04-12 09:35:15 -07:00
drams.txt
drams_map.v
ff_map.v
lut_map.v
Makefile.inc
synth_xilinx.cc Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-12 12:28:37 -07:00