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			10 lines
		
	
	
	
		
			326 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			10 lines
		
	
	
	
		
			326 B
		
	
	
	
		
			Text
		
	
	
	
	
	
| read_verilog -icells <<EOT
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| module adlatch(input d, rst, en, output reg q);
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| $adlatch #(.EN_POLARITY(1'b1), .ARST_POLARITY(1'b1), .ARST_VALUE(1'b0), .WIDTH(1)) uut (.EN(en), .ARST(rst), .D(d), .Q(q));
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| endmodule
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| EOT
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| proc
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| opt_dff
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| stat
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| select -assert-count 1 t:$adlatch
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| sim -r tb_adlatch.fst -scope tb_adlatch.uut -sim-cmp adlatch
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