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Code Activity
yosys/passes
History
Clifford Wolf a1c62b79d5 Avoid parameter values with size 0 ($mem cells)
2015-04-05 18:04:19 +02:00
..
abc Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types 2015-04-05 09:45:14 +02:00
cmds documentation improvements 2015-03-29 20:22:08 +02:00
equiv Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00
fsm Added onehot attribute 2015-02-04 18:52:54 +01:00
hierarchy Added "dffinit", Support for initialized Xilinx DFF 2015-04-04 19:00:15 +02:00
memory Avoid parameter values with size 0 ($mem cells) 2015-04-05 18:04:19 +02:00
opt Added non-std verilog assume() statement 2015-02-26 18:47:39 +01:00
proc Fixed compilation problems with gcc 4.6.3; use enum instead of const ints. 2015-02-24 11:01:00 +01:00
sat Added non-std verilog assume() statement 2015-02-26 18:47:39 +01:00
techmap Added "dffinit", Support for initialized Xilinx DFF 2015-04-04 19:00:15 +02:00
tests Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00