Catherine d9a4a42389 write_verilog: don't assign to a reg. ... Fixes #2035.		2024-04-03 13:06:45 +02:00
..
.gitignore	write_verilog: don't assign to a reg.	2024-04-03 13:06:45 +02:00
aes_kexp128.v
always01.v	Added test cases from 2012 paper on comparison of foss verilog synthesis tools	2013-03-31 11:17:56 +02:00
always02.v
always03.v
arraycells.v
arrays01.v
arrays02.sv
arrays03.sv	Added test for multidimensional packed arrays	2024-02-11 11:26:52 -05:00
asgn_binop.sv
attrib01_module.v
attrib02_port_decl.v
attrib03_parameter.v
attrib04_net_var.v
attrib05_port_conn.v.DISABLED
attrib06_operator_suffix.v
attrib07_func_call.v.DISABLED
attrib08_mod_inst.v
attrib09_case.v
carryadd.v
case_expr_const.v
case_expr_extend.sv	fix iverilog compatibility for new case expr tests	2022-01-03 12:11:41 -07:00
case_expr_non_const.v
case_expr_query.sv
case_large.v
const_branch_finish.v
const_fold_func.v
const_func_shadow.v
constmuldivmod.v
constpower.v	Fixed handling of power operator	2013-11-07 22:20:00 +01:00
defvalue.sv
dff_different_styles.v
dff_init.v
dynslice.v
fiedler-cooley.v
forgen01.v
forgen02.v
forloops.v
fsm.v
func_block.v
func_recurse.v
func_width_scope.v
genblk_collide.v
genblk_dive.v
genblk_order.v
genblk_port_shadow.v
generate.v
graphtest.v
hierarchy.v
hierdefparam.v
i2c_master_tests.v
ifdef_1.v
ifdef_2.v
implicit_ports.sv	Fix valgrind tests when using verific	2022-03-30 17:25:53 +02:00
lesser_size_cast.sv
local_loop_var.sv
localparam_attr.v
loop_prefix_case.v
loop_var_shadow.v
loops.v
macro_arg_spaces.sv	Fix "make vgtest" so it runs to the end (but now it fails ;)	2021-09-23 14:54:28 +02:00
macro_arg_surrounding_spaces.v
macros.v
matching_end_labels.sv
mem2reg.v
mem2reg_bounds_tern.v
mem_arst.v
memory.v	Fix test of memory vs. memory converted to registers	2024-02-11 11:26:52 -05:00
memwr_port_connection.sv
module_scope.v
module_scope_case.v
module_scope_func.v	verilog: Support module-scoped task/function calls	2022-10-29 15:14:11 -04:00
multiplier.v
muxtree.v
named_genblk.v
nested_genblk_resolve.v
omsp_dbg_uart.v
operators.v
param_attr.v
paramods.v
partsel.v	test: add tests for shiftadd and shiftmul	2023-11-06 14:01:37 +01:00
process.v
realexpr.v	Add test case for real parameters	2019-08-20 11:38:21 +02:00
repwhile.v
retime.v
rotate.v
run-test.sh	tests: use /usr/bin/env for bash.	2023-08-12 11:59:39 +10:00
scopes.v
sign_part_assign.v	Add test for rhs sign extension in array slice assignment	2024-01-10 21:15:00 +01:00
signed_full_slice.v
signedexpr.v
sincos.v
specify.v
string_format.v
subbytes.v
task_func.v
undef_eqx_nex.v	Renamed some of the test cases in tests/simple to avoid name collisions	2014-07-25 13:01:45 +02:00
unnamed_block_decl.sv	Fix "make vgtest" so it runs to the end (but now it fails ;)	2021-09-23 14:54:28 +02:00
usb_phy_tests.v
values.v	Replaced RTLIL::Const::str with generic decoder method	2013-12-04 14:14:05 +01:00
verilog_primitives.v
vloghammer.v
wandwor.v
wreduce.v
xfirrtl