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yosys/tests
2023-08-29 10:21:58 +02:00
..
aiger
arch put back previous test state, due to default change 2023-08-29 10:21:58 +02:00
asicworld
bind
blif
bram
errors
fmt cxxrtl: include iostream when prints are used 2023-08-17 07:08:22 +02:00
fsm
hana
liberty fix file rights 2023-05-17 13:39:57 +02:00
lut
memfile
memlib More tests in memlib/generate.py 2023-02-21 05:23:15 +13:00
memories
opt opt_expr: Fix 'signed X>=0' replacement for wide output ports 2023-08-01 13:50:12 +01:00
opt_share
proc proc_clean: only consider fully-defined switch operands too. 2023-08-12 02:46:31 +02:00
realmath Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
rpc
sat
select
share
sim
simple verilog: Support module-scoped task/function calls 2022-10-29 15:14:11 -04:00
simple_abc9
smv
sva
svinterfaces Resolve package types in interfaces (#3658) 2023-02-12 18:25:39 -05:00
svtypes Corrected handling of nested typedefs of struct/union 2023-07-20 23:39:44 -04:00
techmap tests: Extend aigmap.ys with SAT comparison 2023-07-31 16:26:50 +02:00
tools
unit
various ast: use new format string helpers. 2023-08-11 04:46:52 +02:00
verific verific: Fix enum_values support and signed attribute values 2023-03-15 09:51:36 +01:00
verilog Standard compliance for tests/verilog/block_labels.ys 2023-05-21 16:38:14 -04:00
vloghtb
xprop xprop tests: Make iverilog invocation more portable 2023-02-13 16:54:11 +01:00
gen-tests-makefile.sh Out of bounds checking for struct/union members 2023-02-19 23:25:08 +01:00