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arith_map_ccu2c.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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arith_map_ccu2d.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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brams_8kc.txt
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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brams_16kd.txt
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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brams_map_8kc.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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brams_map_16kd.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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ccu2c_sim.vh
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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ccu2d_sim.vh
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_bb_ecp5.v
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fix generated blackboxes for ecp5
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2023-08-28 16:26:26 +02:00 |
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cells_bb_xo2.v
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enable more primitives supported with nextpnr
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2023-08-25 11:45:25 +02:00 |
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cells_bb_xo3.v
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enable more primitives supported with nextpnr
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2023-08-25 11:45:25 +02:00 |
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cells_bb_xo3d.v
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enable more primitives supported with nextpnr
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2023-08-25 11:45:25 +02:00 |
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cells_ff.vh
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_io.vh
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_map.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_sim_ecp5.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_sim_xo2.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_sim_xo3.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_sim_xo3d.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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cells_xtra.py
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fix generated blackboxes for ecp5
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2023-08-28 16:26:26 +02:00 |
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common_sim.vh
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enable more primitives supported with nextpnr
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2023-08-25 11:45:25 +02:00 |
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dsp_map_18x18.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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latches_map.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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lattice_gsr.cc
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ecp5_gsr -> lattice_gsr, change opt_lut_ins to accept lattice as tech
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2023-08-22 10:50:11 +02:00 |
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lutrams.txt
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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lutrams_map.v
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Create synth_lattice
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2023-08-23 10:53:21 +02:00 |
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Makefile.inc
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Add missing file for XO3D
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2023-09-01 10:15:51 +02:00 |
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synth_lattice.cc
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synth_lattice: Wire up cmp2softlogic as an option
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2023-11-13 10:42:12 +01:00 |
