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yosys/techlibs/xilinx/cells.lut
2019-04-09 14:33:37 -07:00

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# Max delays from https://pastebin.com/v2hrcksd
# from https://github.com/SymbiFlow/prjxray/pull/706#issuecomment-479380321
# Since LUT delays are pushed onto the fabric as routing delays,
# assume each input costs +100ps
# K area delay
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8 80 224 324 424 524 624 724 1020 1293