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Code
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3e27b2846b
yosys
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techlibs
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Eddie Hung
5b5756b91e
Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}
2019-09-30 12:52:43 +02:00
..
achronix
anlogic
common
Missing (* mul2dsp *) for sliceB
2019-09-27 14:21:47 -07:00
coolrunner2
easic
ecp5
Combine 'flatten' & 'coarse' labels in synth_ecp5 so proc run once
2019-09-26 10:45:14 -07:00
efinix
gowin
greenpak4
ice40
Re-order
2019-09-27 14:32:07 -07:00
intel
sf2
xilinx
Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}
2019-09-30 12:52:43 +02:00
.gitignore