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Code Activity
yosys/frontends
History
Emil J. Tywoniak be4d67d1a3 rtlil: replace AttrObject::meta_idx_ with ObjMeta pointer
2026-07-20 12:26:39 +02:00
..
aiger signorm: disable in passes that use swap_names 2026-07-17 23:32:34 +02:00
aiger2 read_aiger: import standard-cell mappings from ABC 2026-06-05 11:02:58 +01:00
ast rtlil: set Module* on inner-process AttrObjects at construction 2026-07-20 12:26:39 +02:00
blif End of file fix 2026-06-23 07:23:41 +02:00
json rtlil: evacuate src_id_ from AttrObject to per-Design meta vector 2026-07-20 12:26:39 +02:00
liberty End of file fix 2026-06-23 07:23:41 +02:00
rpc Migrate build system to CMake 2026-06-03 08:58:10 +00:00
rtlil rtlil: replace AttrObject::meta_idx_ with ObjMeta pointer 2026-07-20 12:26:39 +02:00
slang Use system libs when available 2026-07-13 15:26:00 +02:00
verific rtlil: set Module* on inner-process AttrObjects at construction 2026-07-20 12:26:39 +02:00
verilog End of file fix 2026-06-23 07:23:41 +02:00
CMakeLists.txt Use system libs when available 2026-07-13 15:26:00 +02:00