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				https://github.com/YosysHQ/yosys
				synced 2025-10-31 11:42:30 +00:00 
			
		
		
		
	- Techlib pmgens are now in relevant techlibs/*. - `peepopt` pmgens are now in passes/opt. - `test_pmgen` is still in passes/pmgen. - Update `Makefile.inc` and `.gitignore` file(s) to match new `*_pm.h` location, as well as the `#include`s. - Change default `%_pm.h` make target to `techlibs/%_pm.h` and move it to the top level Makefile. - Update pmgen target to use `$(notdir $*)` (where `$*` is the part of the file name that matched the '%' in the target) instead of `$(subst _pm.h,,$(notdir $@))`.
		
			
				
	
	
		
			39 lines
		
	
	
	
		
			873 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			39 lines
		
	
	
	
		
			873 B
		
	
	
	
		
			Text
		
	
	
	
	
	
| pattern muldiv
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| 
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| state <SigSpec> t x y
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| state <bool> is_signed
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| 
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| match mul
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| 	select mul->type == $mul
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| 	select GetSize(port(mul, \A)) + GetSize(port(mul, \B)) <= GetSize(port(mul, \Y))
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| endmatch
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| 
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| code t x y is_signed
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| 	t = port(mul, \Y);
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| 	x = port(mul, \A);
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| 	y = port(mul, \B);
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| 	is_signed = param(mul, \A_SIGNED).as_bool();
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| 	branch;
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| 	std::swap(x, y);
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| endcode
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| 
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| match div
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| 	select div->type.in($div)
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| 	index <SigSpec> port(div, \A) === t
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| 	index <SigSpec> port(div, \B) === x
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| 	filter param(div, \A_SIGNED).as_bool() == is_signed
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| endmatch
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| 
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| code
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| 	SigSpec div_y = port(div, \Y);
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| 	SigSpec val_y = y;
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| 
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| 	if (GetSize(div_y) != GetSize(val_y))
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| 		val_y.extend_u0(GetSize(div_y), param(div, \A_SIGNED).as_bool());
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| 
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| 	did_something = true;
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| 	log("muldiv pattern in %s: mul=%s, div=%s\n", log_id(module), log_id(mul), log_id(div));
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| 	module->connect(div_y, val_y);
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| 	autoremove(div);
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| 	accept;
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| endcode
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