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yosys/tests
2022-02-11 22:54:55 +01:00
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aiger
arch gowin: Fix LUT RAM inference, add more models. 2022-02-09 09:04:34 +01:00
asicworld
bind
blif
bram Fix the tests we just broke 2021-12-10 00:22:37 +01:00
errors
fsm
hana
liberty
lut
memfile
memories Fix the tests we just broke 2021-12-10 00:22:37 +01:00
opt opt_reduce: Add $bmux and $demux optimization patterns. 2022-01-30 03:37:52 +01:00
opt_share
proc
realmath
rpc
sat bug fix and cleanups 2022-02-04 10:01:06 +01:00
select
share
simple fix iverilog compatibility for new case expr tests 2022-01-03 12:11:41 -07:00
simple_abc9
smv
sva Fix "verific -extnets" for more complex situations 2019-03-26 14:17:46 +01:00
svinterfaces
svtypes
techmap Fix the tests we just broke 2021-12-10 00:22:37 +01:00
tools Fixes in vcdcd.pl for newer Perl versions 2021-10-19 10:56:43 +02:00
unit
various logger: fix unmatched expected warnings and errors 2022-01-04 13:39:34 -07:00
verilog verilog: fix dynamic dynamic range asgn elab 2022-02-11 22:54:55 +01:00
vloghtb
gen-tests-makefile.sh