Add torture test for (* nowrshmsk *) stride optimization
2024-01-10 20:28:36 +01:00
plugins: add search path
2025-10-15 14:13:25 +03:00
Another sloppy mistake!
2019-11-21 16:33:20 -08:00
abc9: uniquify blackboxes like whiteboxes ( #2695 )
2021-03-29 22:02:06 -07:00
abstract: test -slice from:to for -init
2025-02-25 00:22:14 +01:00
abstract: Add -initstates option
2025-08-12 15:37:12 +02:00
abstract: test -slice for all modes, -rtlilslice for -init
2025-02-25 00:18:16 +01:00
abstract: test -slice for all modes, -rtlilslice for -init
2025-02-25 00:18:16 +01:00
kernel: Rewrite bufNormalize
2025-09-17 13:56:46 +02:00
write_aiger: Fix non-$_FF_ FFs
2022-08-18 13:56:22 +02:00
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
Fix tests/various/async FFL test
2019-07-09 22:44:39 +02:00
Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.
2019-06-04 10:42:42 +02:00
Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.
2019-06-04 10:42:42 +02:00
tests: fix some test warnings
2020-05-25 10:07:58 -07:00
Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.
2019-06-04 10:42:42 +02:00
autoname.ys: Extra check for rename order
2025-09-26 11:36:23 +12:00
blackbox: Include whiteboxed modules
2021-03-17 13:58:04 +00:00
box_derive: rename -apply to -apply_derived_type
2025-10-13 17:24:32 +02:00
bufnorm: Refactor and fix incremental bufNormalize
2025-09-29 08:21:28 +02:00
Remove references to ilang
2024-11-05 12:36:31 +13:00
Add testcase
2019-12-11 16:52:37 -08:00
add testcase for #1614
2020-02-03 21:29:54 +01:00
ast: fixes #1710 ; do not generate RTLIL for unreachable ternary
2020-02-27 16:55:55 -08:00
Add regression tests for new handling of comments in constants
2020-03-14 11:41:09 +01:00
fsm_extract: Initialize celltypes with full design.
2020-03-19 18:51:21 +01:00
tests: add testcases from #1876
2020-04-14 12:39:10 -07:00
test: add test for #2014
2020-05-02 14:22:37 -07:00
Add test for bug 3462
2022-08-29 10:10:09 +02:00
extract_fa: Add test case
2025-01-30 18:45:06 +01:00
rtlil: Add wire deletion test
2024-01-29 11:25:54 +01:00
ice40_dsp: fix test
2025-03-26 15:13:05 +02:00
splitcells: add tests
2025-03-10 19:41:22 +02:00
simplify: regression test for AST_CELLARRAY simplification issue
2022-12-07 18:41:55 +01:00
celledges: Add test of shift cells edge data
2024-01-19 11:14:10 +01:00
check: Extend testing
2024-03-11 10:45:17 +01:00
check: Extend testing
2024-03-11 10:45:17 +01:00
check: Rephrase regex for portability
2024-03-11 10:45:17 +01:00
celledges: Add read ports arst paths
2024-03-11 10:45:17 +01:00
chformal: Add -assert2cover option
2025-06-14 10:54:23 +12:00
Additional tests for FV $check compatibility
2024-02-02 16:07:10 +01:00
tests: Run async2sync before sat and/or sim to handle $check cells
2024-02-01 16:14:11 +01:00
clk2fflogic: Fix handling of $check cells
2024-02-14 11:42:27 +01:00
clk2fflogic: Fix handling of $check cells
2024-02-14 11:42:27 +01:00
verilog: fix sizing of constant args for tasks/functions
2021-02-21 15:44:43 -05:00
tests: remove -seq 1 from sat with -tempinduct where possible
2025-09-08 18:04:32 +02:00
verilog: fix sizing of constant args for tasks/functions
2021-02-21 15:44:43 -05:00
tests: remove -seq 1 from sat with -tempinduct where possible
2025-09-08 18:04:32 +02:00
Allow localparams in constant functions
2020-08-20 20:10:24 -04:00
Allow blocks with declarations within constant functions
2020-07-25 10:16:12 -06:00
check: Also check for conflicts with constant drivers
2023-06-23 18:07:28 +02:00
Add regression tests for new handling of comments in constants
2020-03-14 11:41:09 +01:00
Added tests/various/constmsk_test.ys
2014-09-04 15:07:30 +02:00
Added tests/various/constmsk_test.ys
2014-09-04 15:07:30 +02:00
tests: fix some test warnings
2020-05-25 10:07:58 -07:00
Add tests for $countbits
2021-02-26 12:28:58 -05:00
tests: remove -seq 1 from sat with -tempinduct where possible
2025-09-08 18:04:32 +02:00
cutpoint_blackbox.ys: Extra edge case
2025-08-06 18:11:35 +12:00
cutpoint: Re-add whole module optimization
2025-05-06 09:57:34 +12:00
deminout: Don't demote inouts with unused bits
2020-03-04 18:44:38 +00:00
design: add test
2020-04-16 12:48:40 -07:00
design: add test
2020-04-16 12:48:40 -07:00
tests: add design -delete tests
2020-04-16 08:05:18 -07:00
Add torture test for (* nowrshmsk *) stride optimization
2024-01-10 20:28:36 +01:00
Initial implementation of elaboration system tasks
2019-05-03 03:10:43 +03:00
Initial implementation of elaboration system tasks
2019-05-03 03:10:43 +03:00
tests: Add equiv_induct to equiv_assume.ys
2025-08-06 15:13:04 +12:00
equiv_make: Add -make_assert option
2022-06-24 00:17:02 +01:00
Add equiv_opt -multiclock
2019-09-11 13:55:59 +01:00
Remove references to ilang
2024-11-05 12:36:31 +13:00
Add test for exec command.
2020-03-16 07:52:58 +00:00
verilog: improved support for recursive functions
2020-12-31 18:33:59 -07:00
verilog: improved support for recursive functions
2020-12-31 18:33:59 -07:00
verilog: support recursive functions using ternary expressions
2021-02-12 14:43:42 -05:00
verilog: support recursive functions using ternary expressions
2021-02-12 14:43:42 -05:00
formalff: Fix -declockgate test and missing emit for memories
2025-04-18 18:57:59 +02:00
sv: complete support for implied task/function port directions
2020-12-31 16:17:13 -07:00
sv: complete support for implied task/function port directions
2020-12-31 16:17:13 -07:00
verilog: significant block scoping improvements
2021-01-31 09:42:09 -05:00
verilog: significant block scoping improvements
2021-01-31 09:42:09 -05:00
ast: Fix handling of identifiers in the global scope
2020-04-16 10:30:07 +01:00
Add support for reading gzip'd input files
2019-07-26 10:23:58 +01:00
Add support for reading gzip'd input files
2019-07-26 10:23:58 +01:00
tests: Fix invocation of 'help -cells'
2023-07-10 12:42:09 +02:00
Fix tests
2019-04-21 11:40:20 +02:00
Expand test with `hierarchy' without -auto-top
2019-09-03 12:17:26 -07:00
add command that should not have any effect to hierarchy -generate test (this documents the current behavior, not sure if it is desired functionality)
2024-04-12 13:51:06 +02:00
hierarchy: Convert positional parameters to named.
2020-04-21 19:09:00 +02:00
Add test for abc9+mince issue
2020-03-20 20:35:28 +00:00
Revert "Revert PRs #2203 and #2244."
2020-07-10 09:59:48 +02:00
Revert "Revert PRs #2203 and #2244."
2020-07-10 09:59:48 +02:00
fix handling of escaped chars in json backend and frontend
2022-02-18 17:13:09 +01:00
emit $scopeinfo cells by default
2025-01-08 14:47:46 +01:00
Add keep_hierarchy test
2024-11-05 09:28:45 +01:00
print summary of line coverage to log
2025-07-16 13:40:07 +02:00
update test to use suggested selection for assertions
2025-07-01 11:46:27 +02:00
update test to use suggested selection for assertions
2025-07-01 11:46:27 +02:00
Add test of error not getting silenced
2024-10-07 14:49:17 +02:00
Added back tests for logger
2020-03-13 15:00:18 +01:00
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
Added back tests for logger
2020-03-13 15:00:18 +01:00
Added back tests for logger
2020-03-13 15:00:18 +01:00
Added back tests for logger
2020-03-13 15:00:18 +01:00
Revert "Revert PRs #2203 and #2244."
2020-07-10 09:59:48 +02:00
Change attribute search value to specify precise location instead of simple line number.
2020-02-24 01:39:36 +00:00
Fix elaboration of whole memory words used as indices
2020-12-26 21:47:38 -07:00
Fix elaboration of whole memory words used as indices
2020-12-26 21:47:38 -07:00
Fix elaboration of whole memory words used as indices
2020-12-26 21:47:38 -07:00
muxcover: do not add decode muxes with x inputs
2023-01-26 05:19:45 +00:00
More deadname stuff
2021-06-09 12:40:33 +02:00
More deadname stuff
2021-06-09 12:40:33 +02:00
tests: remove -seq 1 from sat with -tempinduct where possible
2025-09-08 18:04:32 +02:00
peepopt: Fix padding for the peepopt_shiftmul_right pattern
2023-12-06 18:35:44 +01:00
peepopt clockgateff: add testcase
2024-08-07 10:21:52 +01:00
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
plugins: add search path
2025-10-15 14:13:25 +03:00
Add test for pmtest_test "reduce" demo pattern
2019-08-17 14:05:10 +02:00
Cleanup tests
2020-02-27 10:17:29 -08:00
Add #1135 testcase
2019-06-27 11:02:52 -07:00
genrtlil: fix signed port connection codegen failures
2021-02-05 19:51:30 -05:00
genrtlil: fix signed port connection codegen failures
2021-02-05 19:51:30 -05:00
tests: add tests for primitives' src
2020-05-04 10:21:47 -07:00
printattrs: Add test.
2020-05-27 08:00:00 +00:00
Allow combination of rand and const modifiers
2021-01-21 08:42:05 -07:00
Allow combination of rand and const modifiers
2021-01-21 08:42:05 -07:00
Modified errors into warnings
2018-06-05 18:03:22 +03:00
reg_wire_error test needs the -sv flag so it is run via a script so it had to be moved out of the tests/simple dir that only runs Verilog files
2018-06-05 18:00:06 +03:00
rename: add -scramble-name option to randomly rename selections
2022-08-08 16:03:28 +01:00
rename.cc: Fixup ports after -unescape
2025-08-15 10:48:32 +12:00
rename: add -move-to-cell option in -wire mode
2025-08-13 11:11:52 +02:00
Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting
2024-08-21 14:28:42 +01:00
backends/rtlil: Do not shorten a value with z bits to 'x
2023-01-29 14:02:25 +01:00
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
Test flatten and opt_clean's $scopeinfo handling
2024-02-06 17:51:29 +01:00
add assert option to scratchpad command
2019-12-16 14:00:21 +01:00
Update test for Pass::call_on_module()
2019-07-02 08:22:31 -07:00
Fix setting bits of parameters in setundef pass
2024-11-08 17:03:08 +01:00
Fix setting bits of parameters in setundef pass
2024-11-08 17:03:08 +01:00
ast: use new format string helpers.
2023-08-11 04:46:52 +02:00
tests: fix some test warnings
2020-05-25 10:07:58 -07:00
Remove Xilinx test
2019-08-22 16:18:07 -07:00
Revert "Revert PRs #2203 and #2244."
2020-07-10 09:59:48 +02:00
Extend sign extension tests
2019-06-20 12:43:59 -07:00
sim: Fix handling of constant-connected cell inputs at startup
2020-04-21 08:58:52 +01:00
verilog: ignore ranges too without -specify
2020-02-13 17:58:43 -08:00
verilog: fix specify src attribute
2020-05-04 10:53:06 -07:00
splitnets: handle single-bit vectors consistently
2025-06-05 10:58:06 +02:00
verilog: add test
2020-03-11 06:51:03 -07:00
sta: very crude static timing analysis pass
2021-11-25 17:20:27 +01:00
updated testcase
2025-08-16 09:32:08 +02:00
removed copyright notice on lib file.
2025-08-16 09:40:03 +02:00
add Testcases
2025-08-13 14:46:01 +02:00
testcases
2025-08-16 09:40:03 +02:00
testcases
2025-08-16 09:40:03 +02:00
Fix access to whole sub-structs ( #3086 )
2022-02-14 14:34:20 +01:00
tests: Run async2sync before sat and/or sim to handle $check cells
2024-02-01 16:14:11 +01:00
Add test for bug 3462
2022-08-29 10:10:09 +02:00
Remove submod changes
2019-12-30 14:56:14 -08:00
Added tests/various/submod_extract.ys
2014-07-26 17:22:18 +02:00
Add support for SystemVerilog-style `define to Verilog frontend
2020-03-27 16:08:26 +00:00
Add support for SystemVerilog-style `define to Verilog frontend
2020-03-27 16:08:26 +00:00
Add support for SystemVerilog-style `define to Verilog frontend
2020-03-27 16:08:26 +00:00
Add support for SystemVerilog-style `define to Verilog frontend
2020-03-27 16:08:26 +00:00
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
Redo integer passing on top of bignum
2024-12-02 19:56:51 +01:00
Redo integer passing on top of bignum
2024-12-02 19:56:51 +01:00
Fix test
2024-11-04 16:19:59 +01:00
wrapcell: Test check -assert post wrapping
2024-12-10 15:13:31 +01:00
Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"
2019-08-12 12:06:45 -07:00
wreduce: Optimize signedness when possible
2024-12-16 12:57:08 +01:00
Do not use Verific in tests/various/write_gzip.ys
2019-08-16 14:22:46 +02:00
xaiger: add testcase
2020-05-24 08:48:23 -07:00
e86797f029