3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-30 02:43:52 +00:00
yosys/techlibs/anlogic
2026-06-23 07:24:59 +02:00
..
anlogic_eqn.cc
anlogic_fixcarry.cc Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
arith_map.v Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
brams.txt
brams_map.v
cells_map.v
cells_sim.v Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
CMakeLists.txt Migrate build system to CMake 2026-06-03 08:58:10 +00:00
eagle_bb.v Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
lutrams.txt
lutrams_map.v
synth_anlogic.cc Add check before flatten in synth_*. 2026-05-05 14:06:58 +02:00