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yosys/tests/arch/ice40
2023-11-13 15:28:13 +00:00
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.gitignore
add_sub.ys ice40, ecp5, gowin: enable ABC9 by default 2023-11-13 15:28:13 +00:00
adffs.ys
bug1597.ys
bug1598.ys Add #1598 testcase 2019-12-27 16:44:57 -08:00
bug1626.ys
bug1644.il.gz
bug1644.ys Add #1644 testcase 2020-01-17 15:57:52 -08:00
bug2061.ys opt_lut: Allow more than one -dlogic per cell type. 2021-07-29 17:30:07 +02:00
counter.ys
dffs.ys
dpram.v
dpram.ys
fsm.ys synth_ice40: Use opt_dff. 2020-07-30 22:26:20 +02:00
ice40_dsp.ys
ice40_opt.ys Fix tests for check in equiv_opt 2022-10-07 16:04:51 +02:00
ice40_wrapcarry.ys
latches.ys Share common tests 2019-10-18 12:19:59 +02:00
logic.ys
macc.v
macc.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
memories.ys ice40: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
mul.ys
mux.ys ice40, ecp5, gowin: enable ABC9 by default 2023-11-13 15:28:13 +00:00
rom.v
rom.ys Update tests 2023-06-09 14:41:45 +02:00
run-test.sh
shifter.ys Share common tests 2019-10-18 12:19:59 +02:00
spram.v
spram.ys
tribuf.ys