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3787ea19cd
Change tests/memfile to a mktest, moving the prior run-test.sh contents into a new read_dir.sh. Add dump.ys (and friends) for testing dump_meminit.
62 lines
1.6 KiB
Text
62 lines
1.6 KiB
Text
# create sub dir
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!mkdir -p temp
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# remove output files
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!rm -f gold.m.mem
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!rm -f temp/gold.m.mem
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# load test design
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read_rtlil dump_gold.il
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design -save gold
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# dump_meminit sets INIT_FILE and unsets INIT
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select -assert-any t:$__MEMORY r:INIT %i
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select -assert-none t:$__MEMORY r:INIT_FILE %i
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dump_meminit
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select -assert-none t:$__MEMORY r:INIT %i
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select -assert-any t:$__MEMORY r:INIT_FILE %i
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# memory written to file
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!test -f gold.m.mem
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# file name in INIT_FILE
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select -assert-any t:$__MEMORY r:INIT_FILE=gold.m.mem %i
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design -load gold
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dump_meminit -prefix temp/
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# memory written to sub directory
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!test -f temp/gold.m.mem
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# sub directory in INIT_FILE
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select -assert-any t:$__MEMORY r:INIT_FILE=temp/gold.m.mem %i
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# dump_gate.v calls $readmemh with memory output from dump_gold.il
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design -reset
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read_verilog dump_gate.v
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proc
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design -save gate_proc
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# infer memory for gate
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memory -nomap
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select -assert-any t:$mem_v2
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design -save gate_memory
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# memory read from output of dump_meminit has the same value as the RTLIL
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select -assert-any t:$mem_v2 r:INIT=32'hdeadbeef %i
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design -load gold
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select -assert-any t:$__MEMORY r:INIT=32'hdeadbeef %i
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# dump_meminit does nothing if there are no cells with INIT
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design -load gate_proc
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select -assert-none r:INIT
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dump_meminit
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select -assert-none r:INIT_FILE
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# change cell type since INIT_FILE param is invalid on $mem_v2
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design -load gate_memory
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chtype -set $__MEMORY gate/m
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# dump_meminit on parsed memory
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select -assert-none r:INIT_FILE
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dump_meminit
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select -assert-any r:INIT_FILE=gate.m.mem
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# gold and gate dumps are identical
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!diff -s gate.m.mem gold.m.mem
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