Krystine Sherwin 7c5b10fe50 cellref: Add json dump ... New `help -dump-cells-json <file>` to dump cells list. Add 'group' field to SimHelper class/struct with defaults to gate_other and word_other depending on source (simcells or simlib). Add 'unary' group to unary operator cells for testing (based on internal cell library docs page).		2024-10-15 07:25:27 +13:00
..
choices	techmap: Note down iteration in Kogge-Stone	2024-04-08 16:45:40 +02:00
.gitignore
abc9_map.v
abc9_model.v	abc9: fix SCC issues (#2694)	2021-03-29 22:01:57 -07:00
abc9_unmap.v	abc9: fix SCC issues (#2694)	2021-03-29 22:01:57 -07:00
adff2dff.v
cellhelp.py	cellref: Add json dump	2024-10-15 07:25:27 +13:00
cells.lib
cmp2lcu.v
cmp2lut.v
cmp2softlogic.v	techlibs: Add cmp2softlogic.v to common	2023-11-13 10:42:12 +01:00
dff2ff.v
gate2lut.v
gen_fine_ffs.py	Add $aldff and $aldffe: flip-flops with async load.	2021-10-02 18:12:52 +02:00
Makefile.inc	techmap: Split out Kogge-Stone into a separate file	2024-03-27 11:07:24 +01:00
mul2dsp.v	Fix files with CRLF line endings	2021-06-09 12:16:33 +02:00
pmux2mux.v
prep.cc	Run future as part of prep	2023-09-13 11:32:36 +02:00
simcells.v	Add $aldff and $aldffe: flip-flops with async load.	2021-10-02 18:12:52 +02:00
simlib.v	cellref: Add json dump	2024-10-15 07:25:27 +13:00
smtmap.v	Add smtmap.v describing the smt2 backend's behavior for undef bits	2022-10-20 15:48:18 +02:00
synth.cc	synth: Fix out-of-sync help message	2024-03-06 14:55:43 +01:00
techmap.v	quicklogic: Avoid carry chains in division mapping	2024-09-19 12:18:47 +02:00