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https://github.com/YosysHQ/yosys
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Code
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3486235338
yosys
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backends
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intersynth
History
Clifford Wolf
f4abc21d8a
Add "whitebox" attribute, add "read_verilog -wb"
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-18 17:45:47 +02:00
..
intersynth.cc
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
Makefile.inc
Added intersynth backend
2013-03-23 10:58:14 +01:00