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yosys/techlibs
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Marcelina Kościelnicka 53ba3cf718 Fix the truth table for $_SR_* cells. 
This brings the documented behavior for these cells in line with
$_DFFSR_* and $_DLATCHSR_*, which is that R has priority over S.
The models were already reflecting that behavior.

Also get rid of sim-synth mismatch in the models while we're at it.
2020-04-15 17:17:48 +02:00
..
achronix Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
anlogic Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
common Fix the truth table for $_SR_* cells. 2020-04-15 17:17:48 +02:00
coolrunner2 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
easic Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
ecp5 Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
efinix Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
gowin Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
greenpak4 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
ice40 Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
intel Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
intel_alm synth_intel_alm: VQM support 2020-04-15 16:15:25 +02:00
sf2 Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
xilinx Get rid of dffsr2dff. 2020-04-15 16:22:37 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00