yosys/tests/verilog/macro_unapplied_newline.ys at 336e82c6b6c5e2e0221dc9a0e00fbb5331d3e6d1 - mirrors/yosys - Libre-Chip.org

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Zachary Snow 220cb1f7bb verilog: error on macro invocations with missing argument lists

This would previously complain about an undefined internal macro if the
unapplied macro had not already been used. If it had, it would
incorrectly use the arguments from the previous invocation.

2021-02-19 09:18:41 -05:00

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 logger -expect error "Expected to find '\(' to begin macro arguments for 'foo', but instead found '\\x0a'" 1
 read_verilog -sv <<EOT
 `define foo(a=1) (a)
 `foo
 EOT