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yosys/techlibs/xilinx/brams.txt
2014-12-31 22:50:08 +01:00

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# This is a very simplified description of the capabilities of
# the Xilinx RAMB36 core. But it is a start..
#
bram XILINX_RAMB36_SDP32
init 1
abits 10
dbits 32
groups 2
ports 1 1
wrmode 1 0
enable 4 0
transp 0 2
clocks 1 2
endbram
match XILINX_RAMB36_SDP32
min bits 1024
endmatch