mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-31 03:32:29 +00:00 
			
		
		
		
	
		
			
				
	
	
		
			12 lines
		
	
	
	
		
			437 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			12 lines
		
	
	
	
		
			437 B
		
	
	
	
		
			Text
		
	
	
	
	
	
| 
 | |
| In this directory you will find out, how to generate a spice output
 | |
| operating in two modes, analog or event-driven mode supported by ngspice
 | |
| xspice sub-module.
 | |
| 
 | |
| Each test bench can be run separately by either running:
 | |
| 
 | |
| - testbench.sh, to start analog simulation or
 | |
| - testbench_digital.sh for mixed-signal digital simulation.
 | |
| 
 | |
| The later case also includes pure verilog simulation using the iverilog
 | |
| and gtkwave to represent the results.
 |