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yosys/tests/arch/xilinx
2022-05-18 17:32:56 +02:00
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abc9_dff.ys ast: Use better parameter serialization for paramod names. 2021-03-18 00:52:00 +01:00
add_sub.ys xilinx: Initial support for LUT4 devices. 2020-02-07 09:03:22 +01:00
adffs.ys Make test without iopads 2019-12-28 16:22:24 +01:00
attributes_test.ys xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
blockram.ys xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
bug1460.ys
bug1462.ys
bug1480.ys
bug1598.ys
bug1605.ys
counter.ys
dffs.ys abc9_ops: -reintegrate to use derived_type for box_ports 2020-02-05 14:46:48 -08:00
dsp_abc9.ys
dsp_cascade.ys
dsp_fastfir.ys
dsp_simd.ys
fsm.ys FfData: some refactoring. 2021-10-07 04:24:06 +02:00
latches.ys
logic.ys
lutram.ys xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
macc.sh
macc.v
macc.ys
macc_tb.v
mul.ys
mul_unsigned.v
mul_unsigned.ys
mux.ys xilinx_dffopt: Don't crash on missing IS_*_INVERTED. 2021-01-27 00:32:00 +01:00
mux_lut4.ys
nosrl.ys
opt_lut_ins.ys
pmgen_xilinx_srl.ys
run-test.sh
shifter.ys
tribuf.sh Fix the tests we just broke 2021-12-10 00:22:37 +01:00
tribuf.ys
xilinx_dffopt.ys xilinx_dffopt: Don't crash on missing IS_*_INVERTED. 2021-01-27 00:32:00 +01:00
xilinx_dffopt_blacklist.txt
xilinx_dsp.ys
xilinx_srl.v
xilinx_srl.ys