Eddie Hung 988d47af85 tests: read +/xilinx/cell_sim.v before xilinx_dsp test		2020-04-22 17:50:30 -07:00
..
.gitignore
abc9_dff.ys
abc9_map.ys
add_sub.ys
adffs.ys
attributes_test.ys
blockram.ys
bug1460.ys
bug1462.ys
bug1480.ys	Cleanup tests	2020-02-27 10:17:29 -08:00
bug1598.ys
bug1605.ys
counter.ys
dffs.ys
dsp_cascade.ys
dsp_fastfir.ys
dsp_simd.ys
fsm.ys	Revert "Fix tests/arch/xilinx/fsm.ys to count flops only"	2020-02-27 10:17:29 -08:00
latches.ys
logic.ys
lutram.ys	xilinx: Add support for LUT RAM on LUT4-based devices.	2020-02-07 09:03:22 +01:00
macc.sh
macc.v
macc.ys
macc_tb.v
mul.ys
mul_unsigned.v
mul_unsigned.ys
mux.ys
mux_lut4.ys
opt_lut_ins.ys
pmgen_xilinx_srl.ys
run-test.sh
shifter.ys
tribuf.sh	fix argument order for macOS compatibility	2020-03-18 15:11:49 +01:00
tribuf.ys
xilinx_dffopt.ys	xilinx: xilinx_dffopt to read cells_sim.v; fix test	2020-04-22 16:25:23 -07:00
xilinx_dffopt_blacklist.txt
xilinx_dsp.ys	tests: read +/xilinx/cell_sim.v before xilinx_dsp test	2020-04-22 17:50:30 -07:00
xilinx_srl.v
xilinx_srl.ys