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yosys/frontends/ast
History
Zachary Snow 2e697f5655 verilog: check for module scope identifiers during width detection 
The recent fix for case expression width detection causes the width of
the expressions to be queried before they are simplified. Because the
logic supporting module scope identifiers only existed in simplify,
looking them up would fail during width detection. This moves the logic
to a common helper used in both simplify() and detectSignWidthWorker().
2021-06-08 15:03:16 -04:00
..
ast.cc sv: support tasks and functions within packages 2021-06-01 13:17:41 -04:00
ast.h verilog: check for module scope identifiers during width detection 2021-06-08 15:03:16 -04:00
dpicall.cc dpi: Support for chandle type 2021-01-23 22:24:31 +00:00
genrtlil.cc verilog: check for module scope identifiers during width detection 2021-06-08 15:03:16 -04:00
Makefile.inc Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) 2014-08-21 12:43:51 +02:00
simplify.cc verilog: check for module scope identifiers during width detection 2021-06-08 15:03:16 -04:00