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Code Activity
yosys/backends
History
Lofty 77327b2544 sta: very crude static timing analysis pass 
Co-authored-by: Eddie Hung <eddie@fpgeh.com>
2021-11-25 17:20:27 +01:00
..
aiger sta: very crude static timing analysis pass 2021-11-25 17:20:27 +01:00
blif Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
btor Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
cxxrtl Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
edif Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
firrtl Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
intersynth Intersynth URL 2021-06-09 12:42:52 +02:00
json Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
protobuf Fix protobuf backend build dependencies 2021-09-17 13:36:39 +10:00
rtlil Add optimization to rtlil back-end for all-x parameter values 2021-09-27 16:02:20 +02:00
simplec Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
smt2 Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
smv Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
spice Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
table Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
verilog Give initial wire unique ID, fixes #2914 2021-11-17 12:19:06 +01:00