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This commit adds support for replacing RTLIL modules with CXXRTL black boxes. Black box port widths may not depend on the parameters with which it is instantiated (yet); the parameters may only be used to change the behavior of the black box. |
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.. | ||
aiger | ||
blif | ||
btor | ||
cxxrtl | ||
edif | ||
firrtl | ||
ilang | ||
intersynth | ||
json | ||
protobuf | ||
simplec | ||
smt2 | ||
smv | ||
spice | ||
table | ||
verilog |