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yosys/techlibs
History
Clifford Wolf 909a95182b Fixed xilinx FDSE sim model
2015-01-24 11:03:22 +01:00
..
cmos Added test comments to techlibs/cmos/cmos_cells.lib 2014-01-29 10:51:02 +01:00
common Added $equiv cell type 2015-01-19 11:55:05 +01:00
xilinx Fixed xilinx FDSE sim model 2015-01-24 11:03:22 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00