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tests
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Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files.
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2025-07-22 10:38:38 +00:00 |
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abc9_model.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
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arith_map.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
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brams_defs.vh
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc2v.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc2v_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc3sda.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc3sda_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc4v.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc4v_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc5v_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xc6v_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xcu_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xcv.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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brams_xcv_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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cells_map.v
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Clearer diff for the all-x corner case
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2025-04-07 07:55:30 +02:00 |
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cells_sim.v
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Update Xilinx cell definitions, fixes #3699
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2023-03-23 09:44:36 +01:00 |
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cells_xtra.py
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Update Xilinx cell definitions, fixes #3699
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2023-03-23 09:44:36 +01:00 |
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cells_xtra.v
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Update Xilinx cell definitions, fixes #3699
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2023-03-23 09:44:36 +01:00 |
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ff_map.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
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lut_map.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
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lutrams_xc5v.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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lutrams_xc5v_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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lutrams_xcu.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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lutrams_xcv.txt
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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lutrams_xcv_map.v
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xilinx: Use memory_libmap pass.
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2022-05-18 17:32:56 +02:00 |
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Makefile.inc
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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mux_map.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
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synth_xilinx.cc
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Remove .c_str() from stringf parameters
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2025-09-01 23:34:42 +00:00 |
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urams.txt
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URAM mapping : Add test for 2048 x 144b
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2025-05-10 14:53:56 +02:00 |
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urams_map.v
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URAM mapping : Fix port indexes according to Yosys warnings
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2025-05-09 15:09:11 +02:00 |
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xc3s_mult_map.v
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xilinx: Support multiplier mapping for all families.
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2019-10-22 18:06:57 +02:00 |
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xc3sda_dsp_map.v
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xilinx_dsp: Initial DSP48A/DSP48A1 support.
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2019-12-22 20:51:14 +01:00 |
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xc4v_dsp_map.v
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xilinx: Support multiplier mapping for all families.
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2019-10-22 18:06:57 +02:00 |
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xc5v_dsp_map.v
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xilinx: Support multiplier mapping for all families.
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2019-10-22 18:06:57 +02:00 |
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xc6s_dsp_map.v
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xilinx_dsp: Initial DSP48A/DSP48A1 support.
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2019-12-22 20:51:14 +01:00 |
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xc7_dsp_map.v
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xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325)
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2020-09-23 09:15:24 -07:00 |
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xcu_dsp_map.v
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xilinx: Support multiplier mapping for all families.
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2019-10-22 18:06:57 +02:00 |
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xilinx_dffopt.cc
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rtlil: represent Const strings as std::string
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2024-10-14 06:28:12 +02:00 |
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xilinx_dsp.cc
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_dsp.pmg
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_dsp48a.pmg
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_dsp_cascade.pmg
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_dsp_CREG.pmg
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_srl.cc
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
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xilinx_srl.pmg
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pmgen: Move passes out of pmgen folder
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2025-01-31 15:18:28 +13:00 |
