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yosys/passes
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Martin Povišer 2a3f60bc06 abc_new: Support abc9_box mode on ordinary design hierarchy 
Previously the `abc9_box` mode was reserved to modules with the
`blackbox` or `whitebox` attribute. Allow `abc9_box` on ordinary modules
when doing hierarchical synthesis.
2024-12-10 14:27:29 +01:00
..
cmds Merge pull request #4800 from povik/portarcs-fix 2024-12-09 15:13:15 +01:00
equiv equiv_simple: Take FFs into account for driver map 2024-02-21 12:05:52 +01:00
fsm Reduce comparisons of size_t and int 2024-11-29 12:53:29 +13:00
hierarchy Merge pull request #4706 from povik/keep_hierarchy-adjustalgo 2024-12-03 12:18:28 +01:00
memory rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt Merge pull request #4612 from georgerennie/george/opt_demorgan_zero_width 2024-11-20 13:33:16 +01:00
pmgen Merge pull request #4448 from georgerennie/shiftadd_gating 2024-11-20 13:34:09 +01:00
proc proc_dff: fix early return bug 2024-11-07 00:06:03 +01:00
sat Merge pull request #4525 from georgerennie/peepopt_clock_gate 2024-11-11 14:49:09 +01:00
techmap abc_new: Support abc9_box mode on ordinary design hierarchy 2024-12-10 14:27:29 +01:00
tests rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00