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			162 lines
		
	
	
	
		
			4.8 KiB
		
	
	
	
		
			Verilog
		
	
	
	
	
	
			
		
		
	
	
			162 lines
		
	
	
	
		
			4.8 KiB
		
	
	
	
		
			Verilog
		
	
	
	
	
	
| module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
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| 
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|     input wire CE;
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|     input wire CLK;
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|     output wire OUT;
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|     (* force_downto *)
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|     output wire[WIDTH-1:0] POUT;
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|     input wire RST;
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|     input wire UP;
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| 
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|     parameter COUNT_TO = 1;
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|     parameter RESET_MODE = "RISING";
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|     parameter RESET_TO_MAX = 0;
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|     parameter HAS_POUT = 0;
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|     parameter HAS_CE = 0;
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|     parameter WIDTH = 8;
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|     parameter DIRECTION = "DOWN";
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| 
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|     if (DIRECTION == "UP") begin
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|         if (WIDTH < 2) begin
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|             initial begin
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|                 $display("ERROR: \$__COUNT_ must be at least 2 bits wide (bug in extract_counter pass?).");
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|                 $finish;
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|             end
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|         end
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| 
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|         // FIXME: Max width?
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| 
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|         assign OUT = POUT == COUNT_TO;
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| 
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|         if (HAS_CE) begin
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|             genvar i;
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|             for (i = 0; i < WIDTH; i++) begin: countbits
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|                 // each bit = (cur & !reset) ^ (all prev & !reset)
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|                 wire xor_to_mc_bitn;
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|                 FDCP #(
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|                     .INIT(0)
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|                 ) bitn_ff (
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|                     .C(CLK),
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|                     .CLR(0),
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|                     .D(xor_to_mc_bitn),
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|                     .PRE(0),
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|                     .Q(POUT[i])
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|                 );
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|                 wire orterm_to_xor_bitn;
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|                 wire pterm0_to_or_bitn;
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|                 wire pterm1_to_or_bitn;
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|                 MACROCELL_XOR #(
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|                     .INVERT_OUT(0)
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|                 ) bitn_xor (
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|                     .IN_ORTERM(orterm_to_xor_bitn),
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|                     .IN_PTC(pterm1_to_or_bitn),
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|                     .OUT(xor_to_mc_bitn)
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|                 );
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|                 ORTERM #(
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|                     .WIDTH(1)
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|                 ) bitn_or (
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|                     .IN(pterm0_to_or_bitn),
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|                     .OUT(orterm_to_xor_bitn)
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|                 );
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|                 ANDTERM #(
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|                     .COMP_INP(1),
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|                     .TRUE_INP(1)
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|                 ) bitn_pterm0 (
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|                     .IN(POUT[i]),
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|                     .IN_B(OUT),
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|                     .OUT(pterm0_to_or_bitn)
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|                 );
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|                 ANDTERM #(
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|                     .COMP_INP(1),
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|                     .TRUE_INP(i + 1)
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|                 ) bitn_pterm1 (
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|                     .IN({POUT[i-1:0], CE}),
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|                     .IN_B(OUT),
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|                     .OUT(pterm1_to_or_bitn)
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|                 );
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|             end
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|         end else begin
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|             // Bit0 is special; toggle unless reset
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|             // cur  reset           out
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|             // 0    0               1
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|             // 0    1               0
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|             // 1    0               0
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|             // 1    1               0
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|             wire xor_to_mc_bit0;
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|             FDCP #(
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|                 .INIT(0)
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|             ) bit0_ff (
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|                 .C(CLK),
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|                 .CLR(0),
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|                 .D(xor_to_mc_bit0),
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|                 .PRE(0),
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|                 .Q(POUT[0])
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|             );
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|             wire pterm_to_xor_bit0;
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|             MACROCELL_XOR #(
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|                 .INVERT_OUT(0)
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|             ) bit0_xor (
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|                 .IN_PTC(pterm_to_xor_bit0),
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|                 .OUT(xor_to_mc_bit0)
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|             );
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|             ANDTERM #(
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|                 .COMP_INP(2),
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|                 .TRUE_INP(0)
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|             ) bit0_pterm (
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|                 .IN(),
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|                 .IN_B({POUT[0], OUT}),
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|                 .OUT(pterm_to_xor_bit0)
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|             );
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| 
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|             genvar i;
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|             for (i = 1; i < WIDTH; i++) begin: countbits
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|                 // each bit = (cur & !reset) ^ (all prev & !reset)
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|                 wire xor_to_mc_bitn;
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|                 FDCP #(
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|                     .INIT(0)
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|                 ) bitn_ff (
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|                     .C(CLK),
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|                     .CLR(0),
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|                     .D(xor_to_mc_bitn),
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|                     .PRE(0),
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|                     .Q(POUT[i])
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|                 );
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|                 wire orterm_to_xor_bitn;
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|                 wire pterm0_to_or_bitn;
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|                 wire pterm1_to_or_bitn;
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|                 MACROCELL_XOR #(
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|                     .INVERT_OUT(0)
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|                 ) bitn_xor (
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|                     .IN_ORTERM(orterm_to_xor_bitn),
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|                     .IN_PTC(pterm1_to_or_bitn),
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|                     .OUT(xor_to_mc_bitn)
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|                 );
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|                 ORTERM #(
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|                     .WIDTH(1)
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|                 ) bitn_or (
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|                     .IN(pterm0_to_or_bitn),
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|                     .OUT(orterm_to_xor_bitn)
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|                 );
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|                 ANDTERM #(
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|                     .COMP_INP(1),
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|                     .TRUE_INP(1)
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|                 ) bitn_pterm0 (
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|                     .IN(POUT[i]),
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|                     .IN_B(OUT),
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|                     .OUT(pterm0_to_or_bitn)
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|                 );
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|                 ANDTERM #(
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|                     .COMP_INP(1),
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|                     .TRUE_INP(i)
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|                 ) bitn_pterm1 (
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|                     .IN(POUT[i-1:0]),
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|                     .IN_B(OUT),
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|                     .OUT(pterm1_to_or_bitn)
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|                 );
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|             end
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|         end
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|     end
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| 
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|     // FIXME: down counters
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| 
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| endmodule
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