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	There's a mismatch between what `kernel/mem.cc` emits for memories with no read ports and what the internal RTLIL check expects. The point of dispute it whether some of the parameters relating to read ports have a zero-width value in this case. The `mem.cc` code says no, the internal checker says yes. Surveying the other `$mem_v2` parameters, and internal cell parameters in general, I am inclined to side with the `mem.cc` code. This breaks RTLIL compatibility but for an obscure edge case.
		
			
				
	
	
		
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# check memory_collect doesn't produce invalid RTLIL on a memory w/o read ports
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read_rtlil <<EOF
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autoidx 1
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attribute \top 1
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module \top
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  memory width 4 size 3 \foo
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end
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EOF
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memory_collect
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