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7 lines
159 B
Plaintext
7 lines
159 B
Plaintext
read_verilog adlatch.v
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synth
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#TODO: adlatch is not emited
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stat
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#select -assert-count 1 t:$adlatch
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sim -r tb_adlatch.fst -scope tb_adlatch.uut -sim-cmp adlatch
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