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yosys/tests/arch
Icenowy Zheng c2b7ad3b28 anlogic: support BRAM mapping
Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being
true dual port (or 18bit*512 when simple dual port), the other is
16bit*2K.

Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and
32Kbit BRAM with 8bit width are not support yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-17 20:28:22 +08:00
..
anlogic anlogic: support BRAM mapping 2021-12-17 20:28:22 +08:00
common
ecp5
efinix
gatemate
gowin
ice40
intel_alm
machxo2
nexus memory_bram: Reuse extract_rdff helper for make_outreg. 2021-05-25 22:42:03 +02:00
quicklogic
xilinx
run-test.sh