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Allows fixed-sized array dimension specified by a single number. This commit is based on the work from PeterCrozier https://github.com/YosysHQ/yosys/pull/560. But is split out of the original work.
4 lines
81 B
Systemverilog
4 lines
81 B
Systemverilog
module unpacked_arrays;
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reg array_range [0:7];
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reg array_size [8];
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endmodule
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