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yosys/tests
2019-04-16 13:10:35 -07:00
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aiger Support and differentiate between ASCII and binary AIG testing 2019-02-08 12:41:59 -08:00
asicworld Fix FIRRTL to Verilog process instance subfield assignment. 2019-02-25 16:18:13 -08:00
bram
errors
fsm
hana
liberty Liberty file parser now accepts superfluous ; 2019-03-27 15:16:19 +01:00
lut
memories
opt Fix WREDUCE on FF not fixing ARST_VALUE parameter. 2019-02-22 10:30:42 -08:00
realmath
sat
share
simple fix local name resolution in prefix constructs 2019-03-18 20:43:20 -04:00
simple_abc9 Re-enable partsel.v test 2019-04-16 13:10:35 -07:00
smv
sva Fix "verific -extnets" for more complex situations 2019-03-26 14:17:46 +01:00
svinterfaces
techmap Move tests/techmap/abc9 to simple_abc9 2019-02-20 15:34:59 -08:00
tools Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
unit
various Revert "Recognise default entry in case even if all cases covered (fix for #931)" 2019-04-15 17:52:45 -07:00
vloghtb