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yosys/techlibs
David Shah d29b517fef ecp5: Sim model fixes
Signed-off-by: David Shah <dave@ds0.me>
2018-10-19 15:16:40 +01:00
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achronix
common
coolrunner2
easic
ecp5 ecp5: Sim model fixes 2018-10-19 15:16:40 +01:00
gowin
greenpak4
ice40 Add iCE40 SB_SPRAM256KA simulation model 2018-09-10 11:57:24 +02:00
intel
xilinx xilinx: Still map LUT7/LUT8 to Xilinx specific primitives. 2018-10-08 16:52:12 -07:00
.gitignore