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mirror of https://github.com/YosysHQ/yosys synced 2025-09-15 22:21:30 +00:00
yosys/passes
George Rennie 238e437fca proc_dff: refactor inference logic
* Instead of an ad hoc mix of optimizations and inferences, this tries
  to make it more principled by first extracting a set of asynchronous
  update rules from the process, then optimizing them before lowering
  them to a concrete flip-flop type, preferring simpler ones
2025-09-05 17:31:18 +01:00
..
cmds wrapcell.cc: Avoid format name collision 2025-09-03 03:32:01 +12:00
equiv equiv_simple: Avoid std::array 2025-08-08 12:37:38 +12:00
fsm io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
hierarchy Reapply "Add groups to command reference" 2025-08-06 13:52:12 +12:00
memory Revert "Merge pull request #5301 from KrystalDelusion/krys/re_5280" 2025-08-28 11:58:02 +02:00
opt opt_dff: sigmap bits before looking up muxes 2025-09-05 17:31:18 +01:00
pmgen Reapply "Add groups to command reference" 2025-08-06 13:52:12 +12:00
proc proc_dff: refactor inference logic 2025-09-05 17:31:18 +01:00
sat Reapply "Add groups to command reference" 2025-08-06 13:52:12 +12:00
techmap Build FfInitVals for the entire module once and use it for every ABC run. 2025-08-14 22:29:51 +00:00
tests test_cell: Add comment on $pmux 2025-08-12 10:57:59 +12:00